Engineer responds to RISC-V critique
Archived — this story has rotated out of today’s deck. It is kept here in full.
The gist
Embedded engineer Armstrong Subero rebuts Grinberg's RISC-V critique, arguing low cost and scalability trump encoding elegance.
The debate highlights RISC-V's real-world appeal in cost-sensitive markets, not just technical purity.
Background
The discussion stems from an article by Grinberg titled 'RISC-V: They Should Have Known Better,' which argued that a single ISA cannot serve both high-end CPUs and low-cost microcontrollers. Subero, an embedded systems engineer from Trinidad and Tobago, responded on his blog, agreeing with the premise but disputing the conclusion, citing practical examples from his work. The exchange has drawn attention in the RISC-V community, with further commentary on Hacker News.
How it unfolded
- Aug 14, 2026Grinberg's critique 'RISC-V: They Should Have Known Better' is posted on Hacker News, sparking discussion.
- Aug 16, 2026Armstrong Subero publishes his response on his blog, arguing that RISC-V's low cost and upward scalability are key advantages.
- Aug 16, 2026The response is shared on Reddit's RISC-V subreddit, continuing the debate.
Who’s saying what
- Critic
- Grinberg argues that a single ISA cannot serve both high-end and low-end needs, and that RISC-V's standardization efforts are problematic.
- Respondent
- Subero counters that RISC-V's ten-cent cost and same instruction set across the range make it practical for embedded use, despite encoding concerns.
- Community
- Hacker News commenters note that binary blobs and hardware-specific support remain practical challenges for RISC-V.